1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a semiconductor memory device that performs a refresh operation.
2. Description of the Related Art
A semiconductor memory device includes a plurality of memory banks for storing data, wherein each of the plurality of memory banks includes tens of millions of memory cells. Each memory cell includes a cell capacitor and a cell transistor, and the semiconductor memory device stores data by charging and discharging the cell capacitor. Ideally, the amount of charge stored in the cell capacitor would always be always constant. However, in actuality, the amount of charge stored in the cell capacitor changes due to voltage differences between peripheral circuits. As time goes one, the charge of the cell capacitor may be lost. As described above, changes in the charge stored in the cell capacitor represents a change in the data stored in the cell capacitor, meaning the stored data may be corrupted of lost.
In order to prevent the aforementioned data loss, the semiconductor memory device performs a refresh operation.
With the development of process technology, the integration of semiconductor memory devices increases more and more, thereby influencing the size of the memory banks. A reduction in size of memory banks results in the intervals (or distance) between memory cells being reduced. Additionally, the intervals between word lines that are coupled to adjacent memory cells is reduced. As the intervals between word lines are reduced, new problems arise such as coupling effects between adjacent word lines. When the coupling effect occurs between adjacent word lines, the data stored in the memory cells that are coupled to the word lines may corrupted or lost. That is, there is a significant probability that the memory cells will lose their data.
To prevent such issues, a semiconductor memory device performs refresh operations for all memory cells of a memory bank. That is the number refresh operations may be increased to maintain data reliability at acceptable levels. However, an increase in the number of the refresh operations reduces the operational efficiency of the semiconductor memory device.